[FasterFPGAs]

Intel (Quartus FPGA compiler) | Toronto, ON, Canada

Interested in working on algorithmically-complex C++ code to squeeze out every last bit of performance? Actually using advanced computer science knowledge outside of interviews and programming competitions? Optimizing graph-based algorithms simultaneously for runtime, memory, and quality of the resulting solution? Understanding the hardware as well as the software? Then working on Quartus, Intel's compiler for FPGAs, is for you.

You will work in a downtown Toronto location, with an amazing and diverse group of talented engineers, on some of the most intellectually challenging problems in the world, and your work will directly benefit areas like AI, telecommunications, healthcare, aerospace, finance and more.

I am looking to hire specifically for the Timing Analysis team, which is responsible for one of the most critical components in the Quartus compilation flow (all compilation decisions are ultimately aimed at making the resulting FPGA design faster, and to determine the impact of various decisions on speed you need a robust and efficient timing engine). My colleagues are hiring for other roles. Canadian citizens or Permanent Residents preferred.

Please feel free to ask any questions here in comments, or send a resume to evgeny dot osovetsky at my company name dot com.

[52-6F-62]

Could you point in the direction of/summarize the other roles hiring? Also wondering if there are other teams located in the same location.

I'd love to cut my teeth on the FPGA/embedded systems work, but I'm afraid it's outside of my experience in practice.

[FasterFPGAs]

I don't have a full list, but generally the Toronto office has the following types of software roles: (1) Quartus compiler - this is what takes a digital circuit netlist and tries to map it in an optimal way to the FPGA hardware - doing things like clustering, placement, routing, etc. Lots of very interesting optimization problems. Hardware knowledge is helpful but not required, it's much more important to be able to reason about algorithms and write efficient C++ code to implement them. (The team I'm hiring for is a part of this group). (2) High-level design - basically, how can we make FPGA programming accessible for software engineers who know nothing about hardware? This involves a bunch of compiler work to translate C-like languages (or even higher-level constructs, like machine learning models) automatically to a hardware circuit description, at which point the Quartus compiler from #1 above takes over. Again, hardware knowledge is optional, ability to reason about compilers / algorithms is key. (3) Device modeling - how can we model all of the enormous complexity of a real physical device (with all of its complex timing and power characteristics) into a simplified software model that the Quartus compiler can then use efficiently? Other than these 3 main groups, there are others (e.g. working on specific hardware pre-built blocks that customers can use right away, or working on combination of hardware / software / embedded firmware to make it easier to interface between FPGAs and modern memory microchips).

[52-6F-62]

Thanks! It certainly sounds challenging. Is it safe to assume these will be listed on Intel's website?

[FasterFPGAs]

I'm not sure this is a good assumption.

[52-6F-62]

Thanks kindly.