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by xvilka 2441 days ago
The problem of FPGAs is their proprietary nature, and Verilog/VHDL are far from the best languages. Gladly there is a number of open-source projects aiming to close this gap - Yosys[1], SymbiFlow[2], Chisel3[3]/FIRRTL[4]. Some time ago I suggested[5] different open source projects should unite and reuse the common intermediate language, akin to LLVM in many software development and analysis tools. From my point of view, FIRRTL is the best designed one, there is a huge problem of being implemented in Scala though, especially for C/C++/etc written projects. Hopefully, there will be more collaboration one day. Either reimplementation from scratch, e.g. in Rust or C++, or using Scala Native.

[1] https://github.com/YosysHQ

[2] https://symbiflow.github.io/

[3] https://www.chisel-lang.org/

[4] https://www.chisel-lang.org/firrtl/

[5] https://github.com/SymbiFlow/ideas/issues/19
5 comments
alexhutcheson 2440 days ago
If you're just learning, I'd highly recommend that you stick to the toolchains supported by the manufacturer of the chip you're using. The various open source toolchains are very cool, but they have sharp edges and limitations that won't be obvious to a beginner. Many of them also focus on high-level synthesis, which isn't good for beginners, because you really need to learn the ins and outs of digital logic to be able to debug the output of a high-level synthesis tool.
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rowanG077 2440 days ago
This is true!!! The real problem for me is the IP's. You really do need a DDR SDRAM controller for a lot of real project. Or a PCIE IP to communicate with external resources. If I just use the proprietary tooling it's just a click away to integrated this into a project. Open source has no answer for this as of yet.

Now that we have some nice FPGA's we can use I think this is the next biggest hurdle.

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Ericson2314 2441 days ago
Don't forget https://clash-lang.org/ I've used it a bunch and its real life. I both understood what the compiled circuit would be better and could make powerful abstraction. So a better high level and low level language at the same time!
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piadodjanho 2441 days ago
Just want add Spatial [1] to your list. It is a inovative high level language, very different from the the traditional HDL.

[1] https://spatial-lang.org/

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ernst_klim 2440 days ago
Also Hardcaml, which allows write FPGA code in OCaml.

https://www.youtube.com/watch?v=X1cgRXhpQLY

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