[tpearson-raptor]

Actually, yes! We're closely monitoring the development progress of the open toolchains for various FPGAs; with POWER ISA now being open for implementation by anyone anywhere, I could easily see a future where extremely sensitive work is seamlessly moved from a large closed ASIC like the current IBM POWER chips to a completely software compatible, but significantly slower, soft SoC running in an FPGA. Or even an ASIC, if methods are eventually developed to verify the ASICs match the input design files at scale (i.e. non-destructive testing).

This seamless transition is one of the key benefits of an open ISA in my mind; development and testing of algorithms can be handled on the closed but top of the line (i.e. extremely powerful) ASIC, then when sensitive data is being handled that same binary can literally be run without changes on the soft core or other slower, but open, system. You could even compile on the slower ultra-trusted system, and test the binary on the larger ASIC -- lots of interesting possibilities here!

[madez]

That is exciting! Open and well-documented FPGAs are definitely useful and very interesting to have in a device. Have you looked into OpenPiton [0], PULP [1], BOOM [2], or lowRISC [3]? While I'm hopeful that you find these projects personally interesting, I'm also looking forward to eventually see them in devices. Sorry for not listing any open POWER CPU/SoC projects as I'm not aware of any. Please share if you know any.

[0] https://github.com/PrincetonUniversity/openpiton [1] https://github.com/pulp-platform [2] https://github.com/riscv-boom/riscv-boom [3] https://www.lowrisc.org/

[tpearson-raptor]

Microwatt is the first fully open POWER core:

https://github.com/antonblanchard/microwatt

It's also structured very well, quite clean for learning purposes etc. The current goal so far as I know is to perfect this core, and fork for a more complex / powerful variant. Maybe by the time that's done, the open FPGA tooling will have caught up enough to be able to run a usefully fast (~200MHz) POWER soft core, all in FPGA logic...

I'd strongly prefer a ppc64 core over a RISC-V core for one simple reason: we have a wide deployed base of very powerful ppc64 machines, and not having to keep cross compilers and related environments around is a massive streamlining step that we don't even know the full effects of yet (it hasn't been legal until now to have the SoC under development running the same architecture as the high end workstations and servers used to develop [for] it). The demo of using mainline GCC on a POWER box to build a binary for the Microwatt (that would also run on the host with KVM, if desired, for fast trace and debug) was most impressive.