| I'm surprised that going from TSMC 12nm to 7nm didn't give better power consumption numbers. The combination of better memory and a node shrink seems like it should have bigger effects (though as nodes get smaller, the savings keep diminishing for each shrink). Memory isn't discussed enough and its importance is usually severely underrated. Moving from L1 to a register uses almost 2x as much power as doing an ADD. Moving from L3 to a register uses over 15x as much power as that ADD. Moving from RAM uses over 60x as much power as that ADD.[source](https://hpc.pnl.gov//modsim/2014/Presentations/Kestor.pdf) Navi is a dramatic shift in architecture (despite a lot of people seeming to dismiss it as minor). The new cache design keeps data much more local reducing latency and (more importantly) total power consumption. These in turn allow the more efficient SIMD layout to be fed more consistently. The entire July 7 launch was all about "pipe cleaning" in my opinion. AMD's eye is on those big console and cloud contracts. They aren't selling Amazon or Google a Zen 2. Instead, they are pairing it back-to-back with Zen 3. That will be their second take on 7nm and should have any potential issues worked out. Likewise, they aren't selling these Navi chips to big companies. They will be selling the next, bigger iteration for corporate use. I think PCIe 4 caused them to rush Navi out the door. July 7 has been setup as a kind of makeover for AMD and PCIe 4 is what ties x570, Navi, and Zen 2 together. If AMD doesn't have a PCIe 4 card at launch, it's a huge marketing loss. A half-baked Navi that offers a bit of improvement is better than nothing. I'm betting that performance per watt get quite a bit better by this time next year when the big clients are finally ready to purchase. |