[jacquesm]

> As a result, the compile/edit/run cycle for RTL programming on FPGAs takes hours or days and, worse still, it’s unpredictable: the deep stack of toolchain stages can obscure the way that changes in RTL will affect the design’s performance and energy characteristics.

That's all true but one should really not forget what FPGA's are intended for in the first place: the design of integrated circuits and hours or days is so much better than months for even the simplest custom IC.