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by vnorilo
2647 days ago
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At 4x you would need something like poly-blep with 24/32-bit fixed or floating point support to generate a nice bandlimited sawtooth. Features like oscillator sync can still cause problems. I recall hearing at Clavia HQ that the original Nord Lead used 16x oversampling with a naive generator (subject to hearing it once and my memory over 15 years). Upping to 512x can be reasonable on a fpga, where you can aggressively minimize wordlength and match the DAC. Is there any advantage over say 32x? Maybe not, but feeding the DAC 1:1 can save some complexity. Edit: So I envision the ultra high rate sawtooth as essentially a n.m bit fixed point accumulator wrapping around by itself, with the n-bit (4? 8?) top part going over to the DAC as a kind of directly generated DXD format signal. |
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FPGAs are difficult to program, that’s a pretty steep cost to save you the trouble of downsampling your signal, something which is already pretty damn easy to do.
16x oversampling is fine, DSPs are fine. DXD is snake oil.