[blackstrips]

> more recently implying that CPUs with different process sizes was "cheating".

Not sure where you heard that because Intel’s CPUs have different feature sizes among the layers. It’s done to cut cost.

There is a downside to “glued-together” CPUs as Zen has demonstrated - their L3 cache is splitted and connected by a relatively slow connection.

I hope Intel continues to make “non-split” CPUs where all cores have equal access to single huge L3 cache.

As for moving components off die ... IIRC the Pentium Pro has its L2 cache on a different die but in the same package and the Pentium 2 went even further with the L2 cache on a daughterboard. This isn’t new to anyone.

[rbanffy]

Unisys Micro-A desktop mainframe had, IIRC, 7 chips in the same package.

It was quite remarkable.