Yeah, the BladeRF uses an AD9361[1] as the transceiver, which features a pair of ADCs per channel, of which there are two (so, a total of 4 ADCs and 4 DACs in the package). It's got a bunch of other convenient features like built-in PLLs both LO and baseband.
I haven't studied the BladeRF layout, I can just tell about the Ettus USRP. There, the receive path looks like that:
[Antenna]---[ADL5380 Quadrature Demod]===[2x low-pass filters in parallel]===[2x ADC in parallel]
Then you have digital data that is fed to the FPGA.