Hacker News new | ask | show | jobs
by gameswithgo 2783 days ago
how often can 64 cores be effectively utilized without bumping up on memory throughput as a limiter?

This is pretty challenging at 32 cores! I know these chips ship with big l3 cache but l3 cache isn't so fast either.

1 comments

I'm wondering if we will ever reach a point at which even interpreted languages will be bottlenecked on memory bandwidth rather than cache misses.