[bytefire]

> The instruction pointer is the IP register. It is zero.

it is 0xfff0, at least according to Intel Software Developer's Manual Volume 3, section 9.1.4 "First Instruction Executed". regarding 12 address lines being asserted, that is just a way of thinking about it. actual implementation might be different but what happens on reset is akin to 12 most significant bits being set. CS is 0xf000.

indeed a debugger would give the right answer.

[userbinator]

Initial IP was 0 on the 8086/8088. I suspect that detailed technical information like this tends to be copy-pasted more than understood, which is why a lot of second-sourced information out there on it is just plain wrong or caveated. The sometimes self-contradicting information in Intel's own docs doesn't help either.

This is what I've figured out from Intel's docs:

    8086/88:   CS:IP = FFFF:0000 first instruction at FFFF0
    80186/188: CS:IP = FFFF:0000 first instruction at FFFF0
    80286:     CS:IP = F000:FFF0 first instruction at FFFF0
    80386:     CS:IP = 0000:0000FFF0 or F000:0000FFF0[1], first instruction at FFFFFFF0
    80486+:    CS:IP = F000:0000FFF0(?) first instruction at FFFFFFF0

[1] Depending on which datasheet/programmer's reference manual you read. I can't find any reference to someone who actually checked what the hardware did, however.

More interesting reading...

http://www.rcollins.org/Productivity/DescriptorCache.html

http://www.rcollins.org/ddj/Aug98/Aug98.html

https://www.pcjs.org/pubs/pc/reference/intel/80386/loadall/

[bytefire]

@userbinator thanks for clarification! this is indeed useful and helps understand contradictions.