[c2h5oh]

AMD has manufacturing cost advantage - CPUs are built from 4- core CCXes that can be binned separately.

Intel on the other hand needs to manufacture a monolithic CPU that not only is fault free in enough cores, but performs well. That's harder and yields are way lower.

80% yield on a 4 core block is a 16.7% yield on a 32 core block - and that's before binning

[somebodythere]

If AMD's method scales so much easier, why didn't Intel just... do that? Honest question.

[dragontamer]

Intel could do that. But AMD came out with this method first.

AMD has only been doing this "infinity fabric" thing for a year. Intel was caught with their pants down. It seems like Intel is researching chiplet technology and trying to recreate AMD's success here.

It takes several years to create chips. So Intel realistically won't be able to copy the strategy until 2020 or later. But you better bet that Intel is going to be investing heavily into chiplet technology, now that AMD demonstrated how successful it can be.

[greglindahl]

AMD introduced HyperTransport in 2001.

[dragontamer]

HyperTransport and Intel QuickPath isn't chiplet technology.

AMD "upgraded" HyperTransport to Infinity Fabric. Which IIRC uses a bit less power (taking advantage of the shorter, more efficient die-to-die interposer).

Intel has UPI (upgrade over Intel QuickPath), but it hasn't been "shrunk" to chiplet level yet. Intel has EMIB as a physical technology to connect chiplets together... but Intel still needs to create dies and a lower-power protocol for interposer (or maybe EMIB-based) communications.

So Intel has a lot of the technology ready to create a chiplet (like AMD's Zeppelin dies). But Intel wasn't gunning for chiplets as hard as AMD was. Still, Intel demonstrated their chiplet prowess with the Xeon+FPGA over EMIB. So Intel definitely "can" do the chiplet thing, they just are a little bit behind AMD for now.

[greglindahl]

Intel has done that in the past, actually, their first "dual core" chip (2005) was actually two chips in a package.

https://en.wikipedia.org/wiki/Pentium_D

[hajile]

There was a major difference though. Intel's chips communicated over the front-side-bus (not a great solution considering how FSB was already far inferior to HyperTransport).

[greglindahl]

Sure, that's why the startup I was one of the founders of in that era built a HyperTransport-attached InfiniBand adapter. Intel wasn't very competitive in the supercomputing space back then.

[c2h5oh]

Because it's not free. Communication between cores in different CCXes (and memory access - there is a single memory controller per CCX) has slightly higher latency than within a single CCX (or a monolithic CPU, but here Intel's advantage decreases with core count due to a different interconnect).

Also because they didn't have to innovate - no competition since early Opterons.