[inamberclad]

On a few occasions I've found myself in the presence of a senior engineer at a large defense company who would never stop talking about how persistent memory will change everything forever. Fair enough, but he'd go on about it in the weirdest ways. I think his impression is that the CPU registers would also be nonvolatile. I'm concerned that guy might be a few electrons short of a full orbital.

[vbezhenar]

Saving and restoring CPU registers and flushing caches into non-volatile memory doesn't require much time or energy.

[monocasa]

Specifically, you can normally do something like that between when you notice the power dropping and when it drains too much and you have to shut down.

[Milner08]

This is perfectly possible. I used to work on something that did just this but at the time used a small battery and an SSD to quickly dump the volatile state before power loss. This meant we had to limit the amount of volatile data that could be stored in ram (due to the transfer rate and up time on the battery). We were eagerly awaiting 3DXP DIMMs so that we could remove that limit. It really will have a big impact on critical systems where any data loss is not acceptable.

[zeusk]

Shouldn't be hard, all they have to do is a light context switch to idle thread on power loss interrupt and make the idle thread externally re-entrable.