[QuadrupleA]

I guess in a theoretical NVM-only system you could pull the plug at any time, and instantly resume it when the power is back on? If I'm reading right though the latency of 3DXP is somewhere in the 10-20us ballpark, still 100-1000x slower than DRAM.

[sp332]

Yes but it's also cheaper than DRAM.

You could resume after pulling the plug as long as things are consistent. If you commit data in the wrong order you could have trouble!

[randyrand]

The CPU has internal state as well that won’t be persisted - at the very least the registers.

Would be to save them when you notice power loss.

[rasz]

no, unless Everything else in your system retains state, that includes all the registers in every single chipset/controller/processor.