Hacker News new | ask | show | jobs
by StudentStuff 3074 days ago
The root question is what else is Intel trying to cover up with these garbage patches? Are they afraid of power leakage across gates allowing an attacker to gain a higher level of privilege in certain generations of silicon, and trying to cover it up with these patches (hence some of the seemingly crazy things they do)?
4 comments

I could be very wrong but I read it as Intel trying to cover the fact that there are huge performance penalties with the patch enabled. Therefore Intel will continue to market chip performance sans patch while pushing down the responsibility of enabling them to OS vendors.
Aren’t most independant benchmarks run on OSes that are already patched?
Not with those patches, since they haven't been merged yet. The performance decreases that have been reported so far are for Meltdown patches, those new patches are apparently meant to mitigate Spectre.
Spectre affects AMD as well, how have they been handling this?
They might not "handle" it until there is a POC?
Alternatively, it could also be in the interest of many for these patches to have an inordinate negative affect on performance with Intel CPUs.

I am reminded that Linus has experience in the CPU industry (Transmeta), so he is in a position to see both sides on this.

Sorta off-topic, but what did Linus actually do back at Transmeta? Did he contribute to their JIT compiler for x86?
Probably not secret anymore. CMS (the "Code Morphing Software" that implemented the x86 emulation) originally went straight to translation which was difficult to get correct and was expensive to do for code that might only be run once. Linus, when he joined said "That's stupid" and wrote an x86 interpreter which then acted as the first tier in the emulation. That let to a massive improvement in quality as more workloads could be tested and enabled an awesome creation by Jim Mattson (IIRC): self-cosimulation. CMS could be run in a mode where all translation were cross checked with the interpreter before the results were committed.

This was before my time and I'm sure he did much more. I only have first-hand knowledge of his work on TVM, the Transmeta x86 Virtualization which predated Intel (and AMD's) hardware support for x86 virtualization. Sadly it never productized. I suspect we couldn't find a way to monetize it.

At least the journal reports I read at that time implied that much. He was one of the technical leads on this as far as I recall. So he would have had to get a very good knowledge of the Transmeta CPU and of the x86 instruction set for that task. I think it shows here.
IIRC, he originally wrote Linux to be 386 specific and essientially to get hands on experience with all of the special features.

He was already one of the best minds of x86 who hadn't seen real internals of another chip, hence why Transmeta hired him in the first place.

Why did you pick that specific example (power leakage)? Is there a proof of concept that does something similar?
Thats specific... Why did this come up?