In classic TTL the input currents are also very asymmetric, e.g. for a high level you mustn't draw more than a few dozen µA out of an input, for a low level you have to draw something like 1.5 mA or so.
This is different from current-steering based logic (all kinds of ECL, including CML/SCL) were the current in the circuit stays the same, but only takes a different path depending on state. Supply current is largely independent of circuit state with these.
This is different from current-steering based logic (all kinds of ECL, including CML/SCL) were the current in the circuit stays the same, but only takes a different path depending on state. Supply current is largely independent of circuit state with these.