[Taniwha]

x86s were about the most riscy of the cisc processors - 99.9% of instructions that access memory perform an access to a single address, no double indirect accesses no move memory to memory accesses, not 21 TLB misses on a single instruction (meaning a program might have to have enough memory to get all 21 page table pages and the underlying data pages (42 pages) to make progress) - that sort of thing.

The CISC->RISC thing largely happened because the ratio of cpu speeds and memory speeds changed, low end CPUs got caches, they moved on chip, instruction decoding started to be an issue, the x86s were riscy enough that they survived that change