[hardwarescope]

> They assume that no side channel attacks will be mounted to determine the processes that occur in side the chip.

They do? 2/3rds of this blog post are about side channel attacks. The majority of the technical aspects of the article are about memory side channels in SGX and how they overcome those challenges. I haven't looked at the code yet, but it sounds as if they wrote it to be branchless so that attackers can't monitor control flow and so that memory access patterns don't leak anything.

[DINKDINK]

You're correct. My original statement was wrong regarding Intel's assumption. The principle issue is that developers shouldn't assume that processes that occur in SGX are obfuscated in any sense because you can build SGX sidechannel detection within software that runs inside the enclave The lecture I pointed to shows an example of this attack.