[LeifCarrotson]

Thanks for posting!

I'm curious about what motivated your design choice to use serial EEPROM instead of serial Flash? You could fit a 64 Mbit (2000x larger), 100 MHz (5x faster) Flash IC in the same package.

Downsides would be a few tens of microamps of standby power consumption (a rounding error given the other devices on the board/in the package), page-level erase and re-write (you have plenty of RAM to handle that hassle), and slightly reduced write endurance (but at a few hundred thousand cycles instead of a few thousand cycles, what applications would possibly notice the difference?).

The difference between 4kB (enough to store a serial number and a small bootloader) and 8 MB (large enough for small applications) is significant! The board could be half the size if it didn't need the uSD socket.

What is the EEPROM used for where Flash wouldn't be a better choice?

[welsh]

The design goal around the EEPROM was to have a small space for device and board configuration information. The EEPROM sits on I2C0 in order to maintain pin compatibility with the AM335x and so the data rates to access that memory are not terribly good. We are considering future products that would integrate larger non-volatile storage as well.

[peteey]

EEPROM allows you to write individual bytes. Flash requires you to write many bytes (~256) at once.

Some flash chips compensate by including a small amount of RAM to handle read-modify-write operations.

[mrob]

Flash doesn't always require writing many bytes at once, only erasing many bytes at once. Erasing means setting all the bits in a block to 1 (0xff). It's often possible to write individual bytes, although there's no way to switch a bit from 0 to 1 without erasing the whole block.

[lathiat]

Technically correct... the best kind of correct? :)

[ianhowson]

It's actually a really useful characteristic to keep in mind. If you're writing logs, for example, writing the same block multiple times gives you:

* faster writes

* lower peak power consumption

* lower flash wear

* less chance of data corruption should power fail mid-write