[bsder]

> I wouldn't recommend Icarus Verilog, it's not a very good simulator.

I'm going to make you define "good". Icarus, at one point, handled way more of the standard than even Cadence did and had far fewer bugs.

And I can tell you that at least one graphics chip used to run it's validation suite through Icarus.

[sweden]

I seriously doubt that. Care to share more?

[bsder]

Well, a couple of the people whom "The Steves" (inside joke: for a while it seemed like everybody who was committing code to Icarus Verilog was named Steve--I think there were 5 at one point) used to work with were on the Verilog committee itself. Both Cadence and Synopsys used to fail the validation suite that Icarus used to run.

And I, personally, was the person who reduced our Cadence Verilog licenses by 25% once I got Icarus Verilog up and running. At the time, the EDA vendors were dragging their feet on Linux versions because you had to buy significantly more licenses if you were stuck running it on Sun equipment.

Obviously, my info is highly dated. I haven't tracked Icarus Verilog in quite a while, but code doesn't magically get worse as long as it is being actively maintained. And the original writer/maintainer (Steven Williams) is a solid developer and is still on board.