[gchadwick]

I think that really depends upon the application. If you're using an FPGA because you need custom hardware but can't justify the cost of a full ASIC then by all means floor-plan (indeed you may need to to close timing at your desired frequency).

If you're building a soft-core CPU designed for a wide range of FPGAs and you can't make it go without a custom floor-plan then yes you're probably doing it wrong.