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by bobsam
3304 days ago
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I believe you are confusing microcode (which is mainly used for complex and slow instructions and does not need to be RISC) with micro-ops which is the Intel lingo for the internal RISC operations. Register renaming is a key part of high performance ISA emulation. The x64 has 16 gp registers but the internal RISC normally has 80. Of course this is also a key part of OOO and alike as you mentioned. |
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