[jfktrey]

Slick work! I've been on the hunt for similar projects to compare approaches, but I haven't find many implementations outside of FPGAs.

I like the approach for handling [ and ]. My design is "dumb" in the sense that it uses a `scan` register to handle jumping forward and backwards (so it's quite slow). So far it seems easiest to bite the bullet and scan forwards when [ is zero, but have something similar to your stack pointer for jumping back. Building the jump table for both [ and ] on reset is also a nice optimization.

[cogwheel]

Thanks :) I love that I'm not the first/only one to do one of these in Brainfuck (especially in direct response to Ben's series).

I have a feeling the approach I take will follow from whatever I decide for RAM zeroing. The purist in me is still a bit put off by the idea of preprocessing. It feels more like a compiler+CPU rather than just a CPU. If I go the "highest address counter" approach where I synthesize zeros the first time a RAM location is passed, I probably won't do the loop pre-processing.

I could do a hybrid approach where both jump points are indexed the first time the loop is scanned. This would achieve amortized constant time. I think I could live with that...