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by etep
3311 days ago
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I really like the "parallel" by default paradigm, or perhaps rather, I think it has great potential. When you consider any hardware design (Verilog, Chisel, etc.) the default is to execute in parallel, and sequential is explicit i.e. by instantiating a flip flop or other memory element. If you write in Verilog, you can arbitrarily reorder your lines of code and the resulting hardware is exactly the same (modulo anything you did with always blocks which can be entirely restricted to your sequential elements if you wish). |
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> Data-flow hardware (see Dataflow architecture) is an alternative to the classic Von Neumann architecture. The most obvious example of data-flow programming is the subset known as reactive programming with spreadsheets. As a user enters new values, they are instantly transmitted to the next logical "actor" or formula for calculation.
Nobody (yet) has been able to get dataflow languages fast enough to beat conventional ones.