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by revelation 3378 days ago
Only 1/3rd for the DDR3 controller? That's a great result, given the remainder of a logic analyzer is.. well let's just say there is not much to it, even with protocol decoding.

The point here is: you can get the DDR3 IP block, put it into your FPGA, and your timing will still work just fine. Which is of course kind of a big deal here. I can't put close to the level of logic in a DDR3 interface in a microcontroller and still have it hit the correct timing; all of that pretty much falls apart at the mention of "pipelining" or "vectored interrupt controller". Try doing protocol decoding on the same microcontroller that does the sampling.
1 comments
dragontamer 3378 days ago
Erm, you just buy a microcontroller that supports DDR3 out of the box if you care about large amounts of RAM. There are literally thousands of microcontrollers out there, with a configuration for every single possible task imaginable.

In contrast, you "contact the sales office" of an IP-block of Verilog and read through a ton of FPGA documentation.

I mean, if you really want to just "buy one chip" and do everything with it, be my guest. But honestly, its sometimes easier to just go to a different page in Digikey and buy what you need, instead of trying to build everything you need every time.

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revelation 3378 days ago
I don't think you quite realize what kind of microcontrollers would even come with a DDR3 interface. But if you want to waste away a > 500 MHz chip with sampling GPIO and DMAing that to memory (good luck hitting anything close to what an FPGA could do here, that kind of chip tends to come with multiple levels of caching, pinmuxing, ...) you must have a large BoM and power budget.
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dragontamer 3378 days ago
Point. I think most of the chips I was thinking about are simpler SDRAM controllers.

Nonetheless, I still think that you're grossly underestimating the needs of the FPGA / Logic Analyzer. The product communicates to the PC over USB for instance, performs RAM-level compression and seems to handle some logic-analyzing tasks as well (considering it natively supports I2C, UART, and the like).

EDIT: I think I see where you're coming from now. The next steps then would be licensing issues then. Like whether or not a company could effectively sell the IP-block of the memory-controller and distribute it over the internet (as what has happened in this project).

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