[foobiekr]

Why does intel need to do this?

x86 decode is a tiny, tiny part of the overhead of modern x86 CPUs. Architecture for the most part at this point doesn't matter unless you are talking about truly novel approaches like the Mill. Arm certainly is not a significant improvement.

[wbl]

It's more then just decode. Segmentation, x87 emulation, and the interaction with other features are all pain points.

[StillBored]

None of that is 1/10th as complex as the virt extensions, IOMMU/ATS, etc, etc, etc, Stuff that is common on high end processors these days. If you think x86 is complex, I suggest that you look at aarch64, the smmu, gicv3, etc docs.

Plus, x86-64 basically disables both the things you list. Not that it matters because what is a flat fs/gs/etc register when there is another whole level of page tables for the hypervisor. AKA, you do the translation and store it in a TLB. If you really want to compare this, time how long a modern x86 takes on TLB misses, or for that matter how fast its TLBs are. I think you fill find that they are industry leading...

Same basic thing for the x87, its likely mostly powered down, and when active is probably feeding micro-ops through a SSE functional unit....

So the original posters comment is likely correct, and that has been known for a decade+. X86 if anything has a few accidental advantages, and the idea that its somehow "worse" than the alternatives are provably wrong.

[foobiekr]

None of that stuff matters in reality.

You should think about ISA implementations as verification problems instead of problems in building a silicon implementation of the ISA. From that perspective it should be obvious that intel has the best, richest, deepest verification set that exists in the CPU space and since it is tied to x86, that is an advantage for the two x86 vendors. Verification is incredibly hard for complex CPUs and building up verification is time intensive. This is part of the reason that the brainiac end of the design spectrum has pretty much become just x86 and POWER which has nearly the same history.

[dbancajas]

That's still part of the ISA right? And the 99% of silicon is not spent on those pain points you talk about. Architectural techniques are largely the same for high performance processors, be it ARM/PPC/x86. If you want high performance, you gotta put in the HW required. LSU, prediction, SMT hardware, branch prediction etc... The single thread speed has already been solved a long time ago. There's no point throwing away x86 in favor of a new ISA that has no guarantee of succeeding. In fact, having a new ISA that is incompatible with x86 will just be detrimental to intel/amd.