Wait, so this is mostly a microcontroller chip, right? I keep hearing about its applications in smartphones, but I kind of doubt it could make it @ 160mhz... not to mention PCs.
It's an instruction set architecture with different extensions, a "family" if you would. Just like ARM has 32-bit Cortex M0..M4 microcontrollers, as well as ARM64 with MMU and the works.
These RISC-V silicon implementations on CrowdSupply are on the low end, RV32I (32-bits, integer-only). The SiFive one supports M (multiply) A (atomic) C (compressed, like Thumb for ARM) extensions. No, you cannot build a smartphone with these.
But there are other implementations. An example high-end implementation, 64-bits (you cannot buy silicon yet, but maybe you can burn your own FPGA) is BOOM:
Part of the problem is to produce a high-end RISC-V chip doesn't just need the RISC-V core. It needs all of the supporting IP as well which can be substantial (interconnect, system caches, memory controllers, peripherals etc). Plus to produce something that can complete with modern mobile APs you'll need to fab on a modern process (e.g. 28 or 20nm, though that's a bit long in the tooth if you're targetting things coming out rather than matching current technology, 16FF would be better) which increases costs substantially. Simple, slow, microcontrollers can be fabbed on older and far cheaper processes.
> but I kind of doubt it could make it @ 160mhz...
The second chip in those links is a Arduino-compatible MCU that already runs at 320mHz+, so it's got 2x as many cycles as you wanted!
> not to mention PCs.
There have also been demo runs of some 64-bit RISC-V boards, using the same FPGA core that 320mHz chip uses ("Rocket"), that have already hit 1gHz+ on old (think 180nm?) fab processes. It can certainly do GHz, it seems.
RISC-V is an instruction set architecture (ISA) specification. So the standard is really just a definition of some instructions and what they should do. The unique part is the fact it is an open standard and so does not require any licensing or royalties.
This means that anyone can then go away and build their own processor implementation to that standard. Intel could create their own chip for that instruction set and get it running at 4Ghz with your latest fab facility. At the other extreme I could sit at home and use Verilog to create a soft core that is downloaded to an FPGA and be up and running with a much slower implementation). Neither of us has to pay anyone for the right to do so and the code we write should work on both because it adheres to the same standard.
In contrast, if you want to create an ARM or x86 processor then you have to pay a license fee. Even if you implement the entire processor from scratch and use nothing from ARM or Intel except the instruction set specification, you still need to pay and it is not cheap. There are many situations where you want to avoid that cost. A researcher wants to experiment with a new idea, you want an internet of things processor but cannot afford the license cost of an existing processor. Or your Samsung and produce zillions of phones a year and saving that dollar per phone is worth having.
As the RISC-V standard is relatively new it means that the first designs to market are the targets that are easiest to create, so microcontrollers. SiFive are now moving up the scale and are working on a full processor with MMU that could be used to run something like Linux. I would expect to see something like that appear within a year or so.
These initial chips in crowdfunding are smallish/microcontroller-like, since they are easier to make and what people like to toy with initially.
RISC-V is an ISA that can be used for all kinds of chips eventually, just like there are ARM offerings from <100 Mhz microcontrollers to >1 GHz multi-core phone SoCs.
These RISC-V silicon implementations on CrowdSupply are on the low end, RV32I (32-bits, integer-only). The SiFive one supports M (multiply) A (atomic) C (compressed, like Thumb for ARM) extensions. No, you cannot build a smartphone with these.
But there are other implementations. An example high-end implementation, 64-bits (you cannot buy silicon yet, but maybe you can burn your own FPGA) is BOOM: