| There is a "references" section at the bottom: [Agner4] Agner Fog, “Instruction tables. Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs” [Agner3] Agner Fog, “The microarchitecture of Intel, AMD and VIA CPUs. An optimization guide for assembly programmers and compiler makers” [Intel.Skylake] “Intel® 64 and IA-32 Architectures Optimization Reference Manual”, 2-6, Intel [Levinthal] David Levinthal, “Performance Analysis Guide for Intel® CoreTM i7 Processor and Intel® XeonTM 5500 processors”, 22 [NoBugs] 'No Bugs' Hare, “C++ for Games: Performance. Allocations and Data Locality” [AlBahra] Samy Al Bahra, “Nonblocking Algorithms and Scalable Multicore Programming” [eruskin] http://assemblyrequired.crashworks.org/how-slow-are-virtual-... [Agner1] Agner Fog, “Optimizing software in C++. An optimization guide for Windows, Linux and Mac platforms” [Efficient C++] Dov Bulka, David Mayhew, “Efficient C++: Performance Programming Techniques”Amazon, p. 115 [Drepper] Ulrich Drepper, “Memory part 5: What programmers can do”, section 6.2.2 [TCMalloc] Sanjay Ghemawat, Paul Menage, “TCMalloc : Thread-Caching Malloc” [Wikipedia.ProtectionRing] “Protection Ring”, Wikipedia [Ongaro] Diego Ongaro, “The Cost of Exceptions of C++” [LiEtAl] Chuanpeng Li, Chen Ding, Kai Shen, “Quantifying The Cost of Context Switch” |