[blumentopf]

Yes, because the PCIe root complex in the CPU can only connect one other device besides the southbridge, and that's used for the Thunderbolt controller on the left handside. The second Thunderbolt controller is connected to the southbridge (as are all the other PCIe peripherals), so it doesn't have the same number of PCIe lanes available as the one directly connected to the root complex.

Apple could have solved this by connecting a PCIe switch to the root complex and attaching both Thunderbolt controllers below it, but that would have consumed additional energy. Alternatively they could have used a beefier CPU with more PCIe root ports on the CPU, but I guess those available would have been too energy hungry. Which kind of means this is Intel's fault for not providing a low-energy chip with enough PCIe root ports on the CPU.

I'm wondering what the situation is like on the 15" version with discrete graphics. This would require 3 root ports directly on the CPU to drive both Thunderbolt controllers and the GPU with full speed, I assume that's indeed the case since it's not mentioned in the document.

Another thing not mentioned in the document is that energy consumption will be suboptimal if one device is attached on both sides of the machine because it prevents one of the Thunderbolt controllers from powering down. One should connect both devices on one side to improve battery life.

Edit: On Skylake the PCH is apparently optional, the functionality is mostly integrated into the CPU, so the limitation is really the number of lanes provided by the CPU, and this wasn't sufficient to connect both Thunderbolt controllers with 4x. The CPUs used in the 13" model all have 12 lanes, the ones in the 15" model have 16 lanes. So for the top-of-the-line model this could be 4x for each of the Thunderbolt controllers, 4x for the GPU, 2x for the SSD, 1x for Wifi, 1x for HD Audio?

[erik]

Re:your edit, the PCIe lane configurations from the CPU aren't that flexible. There is no 4x+4x+4x+2x+1x+1x configuration.

4x Thunderbolt + 4x Thunderbolt + 8x GPU, with everything else on the PCH would make sense for the 15". Or maybe they connected the SSD (also 4x PCIe) to the CPU, and one of the Thunderbolt controllers to the PCH.

Hopefully they used the full set of CPU lanes. Most laptop manufacturers have a tendency to under utilize the CPU lanes and put things on the bandwidth constrained PCH for some reason.

[tmzt]

This feels like something Steve would not have let out the door, those kind of rules should never be the customer's concern.

[Decade]

Yes, he did. As nsxwolf commented, the 2010 MacBook Pro had USB 2 ports that ran at different speeds. And I remember vaguely that that wasn’t the first time.

It’s just not your problem because, really, how many people are going to be inconvenienced by the right Thunderbolt ports being slightly slower than the left Thunderbolt ports?

[revelation]

Full Thunderbolt 3 for all four ports on the 15"?

I mean, I'm not sure how you can get 40 GBit/s with 4x PCIE 3.0 in the first place, every quote I find says 32 GBit/s. Maybe there is that much overhead in Thunderbolt.

But surely 4x40 Gbit/s would require 16 lanes at least. I don't think Intel makes any consumer CPUs with more than 16.

[erik]

The 40 GBit/s is definitely confusing.

My understanding is that that's total bandwidth across all protocols. So the mix of Displayport and PCIe 3.0 can't exceed 40 GBit/s. The 4x PCIe 3.0 on it's own is 32 Gbit/s, as you mentioned.

Each controller provides two Thunderbolt ports, which share bandwidth. For the 15", 4x PCIe to the left side Thunderbolt controller, 4x PCIe to the right side Thunderbolt controller, and 8x to the GPU would be a sensible configuration. Though who knows if Apple took this approach.

[Klathmon]

What do you mean by consumer CPUs?

I've got an ivybridge i7 with 40 lanes right now in my system.

[danudey]

4x PCIe 3.0 (~30Gbit) + USB 3.1 Gen 2 (10 Gbit) = the 40 GBit number quoted.