When they say that they are manufacturing a 7nm transistor it means the smallest feature is 7nm across. The gate size isn't always the smallest feature of a transistor; it typically is, but not always. And sometimes the larger features can be 4 to 5 times bigger, i.e a drain can be 40~50nm across because it connects to multiple other transistors or is part of a compound transistor. Transistors are inherently analog devices and so feature layout isn't as simple as "I need an XOR gate in this part of the circuit".