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by mankash666 3551 days ago
The new numbers Intel is claiming, can be met by floating gate transistors that are randomly accessible (versus those arranged in bit lines and word lines like in NAND). Especially for a single level cell. No need for another materials science/physics like "x point", unless"x point" actually is just a PR spin without any new physics.
2 comments

Sure, can be met, and they are random accessible, but that means a lot more wiring, right? So density goes waaay down. (Or cost goes up.) Though maybe at least they can use their "7nm process" for this too, to keep things economical.
Can you please explain this in layman's terms?
Floating gate = the switching element on a transistor acts as a capacitor and can hold charge. the basic primitive for building flash memory.

NAND SSDs which are common today are essentially rows of similar structures. Each row is a string of floating gate transistors, and to read a single bit, you gotta run the whole operation of reading the entire row.

Random access means that you can read anything anywhere without any sort of similar caveats.

If interested, an intro to flash electronics is here: http://www.eeherald.com/section/design-guide/esmod16.html