[ramchip]

Compression wouldn't be much use if it were applied one opcode at a time, so I suppose you'd have to either read the code one block at a time, which could make jumps very slow, or the compiler and instruction decoder would have to do somewhat crazy stuff to turn code paths into compressed blocks.

[derefr]

Main memory is already read a block at a time anyway, to get the gains we all expect for space locality. I'm imagining the blocks (probably equivalent to memory pages, in practice) would be kept uncompressed in L1/2 cache memory, with an additional layer of cache added on top for compressed blocks. Then, a near jump would be a read on a low-cache hit, and a decode on a high-cache hit, while a long jump would be a page-fault+decode as usual.