|
|
|
|
|
by chrisseaton
3595 days ago
|
|
Obviously no backend is in SSA format after register allocation, but before allocation what do other compilers use if not SSA? Is there some kind of low-level LLVM and GCC IR separate from the front-end and middle one? That isn't in SSA? I know that the C2 and Graal compilers are SSA all the way until register allocation is done. |
|
GCC uses a separate representation (RTL) for their backend that is not in SSA form [2]. LLVM stays in SSA form for some backend phases but lowers the SSA form before register allocation (as also mentioned in [1]).
I took a quick look at the C2 and the Graal compiler. C2 seems to use LLVM's code generator (and thus lowers SSA before register allocation) but Graal seems to support SSA-based register allocation, nice.
[1] https://news.ycombinator.com/item?id=11210948
[2] https://en.wikibooks.org/wiki/GNU_C_Compiler_Internals/GNU_C...