[trsohmers]

We'll send an announcement on the mailing list when tools (software based and FPGA based simulation, along with actual silicon) will be available. We will only be getting 200 chips back from this initial test run, so we have to be fairly stringent in who will be getting hardware eval units in the coming months, but if you have a compelling application idea, feel free to send me an email (in my HN profile) and let me know.

[6d65]

This sounds good. One of the big problems with Mill CPUs is there is that they don't have working silicon yet. I would say getting as much people as possible to play with it, is crucial for a new architecture to get traction.

Even better than that would be a open architecture like RISC-V. Though, open architecture has its own drawbacks.

Also, as a side note, what do you think about the possibility of using Genetic Algorithms and Machine Learning to generate more efficient types of interconnect architectures.

[joshu]

I am looking forward to hearing how this goes.

[trsohmers]

I'd be happy to give you an update. Shoot me an email if you want to catch up.

Also: Looking forward to see more in the self driving car racing ;)