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by white-flame
3661 days ago
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The NMOS logic circuitry of the time had pull-up resistors bringing up the voltages to 5V. Chips would then ground the lines to make 0V. So in many logical views, '1' is the default state, and '0' is the active state. Unconnected bits would often leave the lines at 1. So, if you ask a chip to read a value, and it asserts 4-bit number on the 8-bit data bus, it would tend to be 1111xxxx
in binary, or 240+x.(Note: I don't know if it asserts 4 bits on the bus, and the bus pull-ups keep the upper 4 bits high, or if it's internal to the chip that the bits are naturally pulled up and it in fact asserts all 8 bits. Same net effect, modulo some sub-cycle rise/fall timing.) |
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