[wyager]

I'd been dabbling with it for a year or two.

Probably my most significant previous use was in my second-semester computer architecture class as a substitute for Verilog. Using Christiaan Baaij's Cλash project, one can transform a (large) subset of Haskell into VHDL/Verilog/SystemVerilog and slap it on an FPGA. There's a rundown of that project on my blog too.

My project partner had never really used Haskell before, so he was learning as we went. By the end of the semester he was writing code no problem. "Immersion learning" seemed to work quite well here.