[dgrnbrg]

I wrote a similar project to this in Clojure, called Piplin: http://www.piplin.org. I worked on it for a year, and did some interesting things to enable REPL-driven FPGA development, but over time my interests shifted to macro-scale systems.

[sklogic]

There was also this project: https://www.usenix.org/conference/dsl-99/verischemelog-veril...