[femto]

A more productive route might be to port the camera project [1] (for which the models are being requested) to use the Lattice ICE series of FPGAs and use the open source Project ICEstorm tool chain [2]?

That would have the dual effect of further developing the free tool chain, and sending a (small) signal to Xilinx that if they don't take Free Software seriously they will start to lose customers.

[1] https://github.com/Elphel/x393

[2] http://www.clifford.at/icestorm/

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edit: change "GPL licensed" to "open source", as a variety of licenses are used.

[Andrey_Filippov]

Project uses 84% of Zynq (7030), it will not fit in Lattice :-(

[femto]

Fair enough, and there is an order of magnitude between size of the the 7030 and supported ICE parts (125K cells vs. 7680 cells), so it's beyond optimisation.

Out of curiosity, is there any one block/function that is consuming a majority of the cells? What is that block?

[Andrey_Filippov]

No single dominating block. Camera has 4 sensor channels (now either 12 bit parallel or Aptina HiSPI) with gamma and histograms, 16-channel DDR3 controller, 4 compressor channels, inter-camera synchronization and high-speed IMU logger. And AHCI SATA2 controller (with provisions to be later upgraded to SATA3). The last module uses 6%, others share other 78% slices. As most of them have 4 identical instances, it makes about 10% each. Years ago one similar channel (1 sensor, 1 compressor, slower clocks) was implemented on Spartan-3e.