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by tkinom
3914 days ago
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If a DDR stall is 50+ cpu cycles, (probably a lot more with today's 2, 3GHz CPU), I am not sure if superscalar microarchitectures would help too much. At lease in my case of networking packet forwarding app, I had the profiling data to prove that was an issue. The app code is not that long ~2000 lines of code after clean up. But it have a lot of table looks up (DDR stall) and branches for error condition checks. |
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