Memory bus is just for speed. You don't want it doing stuff like that lol. See these two LISP machines for where my inspiration of putting it on memory bus came from:
(See section 7 for a radical... err realy old... way to do concurrent GC. Full paper available at ACM/IEEE or if you Google LISP processors Guy Steele enough.)
(See the main graphic and specifics in storage section later. Once again, GC-like stuff is handled in memory management part of the processor. This processor knows that, though, to assist GC a bit. Also different in that it was specified and then synthesized to heterogenous hardware with DDD "correct-by-construction" toolkit.)
So, have fun with those. Plus, Google hardware-assisted or hardware garbage collection to get lots of interesting results already done.
http://diyhpl.us/~bryan/papers2/paperbot/Design%20of%20a%20L...
(See section 7 for a radical... err realy old... way to do concurrent GC. Full paper available at ACM/IEEE or if you Google LISP processors Guy Steele enough.)
Scheme machine by Burger 1995
http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=569...
(See the main graphic and specifics in storage section later. Once again, GC-like stuff is handled in memory management part of the processor. This processor knows that, though, to assist GC a bit. Also different in that it was specified and then synthesized to heterogenous hardware with DDD "correct-by-construction" toolkit.)
So, have fun with those. Plus, Google hardware-assisted or hardware garbage collection to get lots of interesting results already done.