[cturner]

@beneater - if I wanted to wire-wrap my own system like this, what's a sensible way to think about managing the wires, and what sort of boards to get? These are naive questions - I've done some electronics theory but hardly anything practical. I've now read a couple of tutorials about wire-wrap pen tools, but I don't yet have a feel for the boards. Maybe I'm googling for the wrong things. Also, what is the name for the thing that you mount a microchip in, in order that you have a lead to wrap around?

[pjc50]

"Wire Wrap DIL sockets" are the thing you want. Obviously this requires DIL chip packages too. The boards are unplated veroboard with 0.1" hole spacing.

It will be tempting to gather wires next to one another in neat rows, but this worsens crosstalk. You can probably achieve speeds of several MHz with wirewrap. With a small amount of practice it's the fastest prototyping technology and easier and cleaner to rework than soldering.

[cturner]

This is very helpful, thank you. In particular thanks for the tip about not lining things up in rows, because that's just what I would have done. I could probably write a script so that I could design things in neat rows on a screen, and then it could fit it for me in a tight bunch, and then I could wrap it.

Are there smart ways to use decoupling capacitors to get more?

How do you get a feel for how much room you have to play with as far as MHz? Is it just a case that you start with something small, and then go up until it breaks?

Are there practicalities of what chip generations is possible with wire-wrap? 6502 would be possible with wire-wrap. What about Motorolla 68k? (Also - what is the most sophisticated 68k chip that's still commercially available? Speed and memory addressing are important, MMU is not.)

[pjc50]

You can get built in decoupling capacitors: https://www.mill-max.com/products/socket/122-XX-XXX-41-80100...

You could certainly estimate the clock frequency in advance. The things that are going to cause trouble are transmission line effects (ie pulse length no longer >> wire length), and the usual digital logic critical path constraints: wire and gate delays; clock skew and drive strength; fanout constraints.

More decoupling doesn't help you once you have enough to prevent crosstalk through the power supply. Star-routing the power and ground may be a good idea.

I've done 20MHz. Coincidentally this is the limit of cheap scopes. This page claims 33MHz is achievable, and gives a good explanation of why: http://www.sigcon.com/Pubs/news/2_8.htm

Some good tips: https://www.pjrc.com/tech/8051/dev-board-wirewrap.html

Reccomendation to use the kind of board with built-in ground plane (sounds good if you can find it): http://www.williamson-labs.com/prototype-lt.htm

For IC availability, check your local Digikey. Note that 68k is still being manufactured as "Coldfire" by Freescale (with slight backwards incompatibility).

[cmrdporcupine]

I've seen lots of 68k wire wrapped projects out there on the web. Even breadboarded.

I haven't really done any wire wrap projects, just played with it a bit, but I really liked this page for general advice, he seems to know the art well:

http://wilsonminesco.com/6502primer/WireWrap.html

[cmrdporcupine]

I wanted to get into wire wrap, but I've had a hard time getting quantity of wire wrap sockets for a reasonable price. It's an art that has fallen out of fashion.

After seeing the clock rates this guy has managed to get out of breadboarding, I might just stick with breadboarding.