[throwaway000002]

Is there anything novel with respect to the original Transputer that you've decided to introduce while implementing your design?

As I am not familiar with the Transputer, how does the on-chip communication structure compare to the work of Xmos and their Xcore architecture? I believe David May was involved with that as well.

Looking forward to reading your dissertation.

[w34]

By the way our dissertation is online and easy to access: http://www.opentransputer.org/wp-content/uploads/2015/06/dis...

To answer the XMOS question: XMOS's design was quite heavily influenced by the original Transputer and therefore they are quite similar. The one major difference to note that we're a stack machine.

XMOS uses registers and is limited to 8 threads per core in most of their architectures. So if you suddenly want to go large and build a massively distributed system you might have to take into consideration that on each individual XMOS chip you can only run 8 processes at a time and might have to change your software.

With our stack machine approach you can run the same program that may basically consist of an unlimited number of processes (as long as you have enough memory to store them that is) on either just one single Transputer or -- with no change to your program -- on an array of (unlimited) Transputers with each Transputer running one process.

So the entire architecture makes scaling easier.

I also think the way we talk to peripherals is different to XMOS but I'd have to check up on that. I've used XC and XMOS boards before as part of my degree here at Bristol but I never connected peripherals and then interfaced them on their boards.

[w34]

Yes!

There are quite a few changes we made on the architectural and microarchitectural level. Our dissertation and the presentation slides do mention this but I'll give you the gist of it:

We replaced the existing serial communication links with a single link that connects to a network of switches that are arranged in a Benes fashion. This allows for a very scalable way of building networks and is actually used in telecommunications systems. Our supervisor, Professor David May actually gave us the idea. Seemed pretty smart to me compared to other ways of building large networks.

We also introduced a new way of interfacing with peripherals (I/O), sensors and other things that might be useful to have if you're developing a piece of IoT hardware. And as I said we use the same message passing mechanism to interface with them that we also use for communication.

We also made lots of changes on the microarchitectural side: We went away from a microcoded design and became more akin to RISC by using hard wired logic.